发明授权
US07504294B2 Method of manufacturing an electrically erasable programmable read-only memory (EEPROM)
有权
制造电可擦除可编程只读存储器（EEPROM）的方法
- 专利标题： Method of manufacturing an electrically erasable programmable read-only memory (EEPROM)
- 专利标题（中）： 制造电可擦除可编程只读存储器（EEPROM）的方法
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申请号： US10881180申请日： 2004-07-01
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公开(公告)号： US07504294B2公开(公告)日： 2009-03-17
- 发明人: Kikuko Sugimae , Hiroyuki Kutsukake , Masayuki Ichige , Michiharu Matsui , Yuji Takeuchi , Riichiro Shirota
- 申请人： Kikuko Sugimae , Hiroyuki Kutsukake , Masayuki Ichige , Michiharu Matsui , Yuji Takeuchi , Riichiro Shirota
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权： JP2001-390993 20011225; JP2002-072460 20020315
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
A semiconductor device comprises a memory cell array portion and peripheral circuit portion, wherein a first insulation film including elements as main components other than nitrogen fills between the memory cell gate electrodes of the memory cell array portion, the first insulation film is formed as a liner on a sidewall of a peripheral gate electrode of the peripheral circuit portion simultaneously with the memory cell portion, and a second insulation film including nitrogen as the main component is formed on the sidewall of the peripheral gate electrode via the first insulation film, thus enabling not only the formation of the memory cell portion having high reliability, but also the formation of a peripheral circuit with good efficiency, simultaneously, and avoiding gate offset of a peripheral gate.
公开/授权文献
- US20040238847A1 Semiconductor device and manufacturing method 公开/授权日：2004-12-02
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