发明授权
US07506081B2 System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories
失效
从低带宽存储器维持数据管道的高带宽需求的系统和方法
- 专利标题: System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories
- 专利标题(中): 从低带宽存储器维持数据管道的高带宽需求的系统和方法
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申请号: US10850219申请日: 2004-05-20
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公开(公告)号: US07506081B2公开(公告)日: 2009-03-17
- 发明人: Peter Irma August Barri , Jean Louis Calvignac , Kent Harold Haselhorst , Marco C. Heddes , Joseph Franklin Logan , Fabrice Jean Verplanken , Miroslav Vrana
- 申请人: Peter Irma August Barri , Jean Louis Calvignac , Kent Harold Haselhorst , Marco C. Heddes , Joseph Franklin Logan , Fabrice Jean Verplanken , Miroslav Vrana
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Driggs, Hogg, Daugherty & Del Zoppo Co., LPA
- 代理商 Joscelyn G. Cockburn; Anthony M. Del Zoppo, III
- 主分类号: G06F3/00
- IPC分类号: G06F3/00
摘要:
A Network Processor includes a Fat Pipe Port and a memory sub-system that provides sufficient data to satisfy the Bandwidth requirements of the Fat Pipe Port. The memory sub-system includes a plurality of DDR DRAMs controlled so that data is extracted from one DDR DRAM or simultaneously from a plurality of the DDR DRAMs. By controlling the DDR DRAMs so that the outputs provide data serially or in parallel, the data Bandwidth is adjustable over a wide range. Similarly, data is written serially into one DDR DRAM or simultaneously into multiple DDR DRAMs. As a consequence buffers with data from the same frame are written into or read from different DDR DRAMs.