发明授权
- 专利标题: Process for producing semiconductor integrated circuit device
- 专利标题(中): 半导体集成电路器件制造工艺
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申请号: US11598084申请日: 2006-11-13
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公开(公告)号: US07553756B2公开(公告)日: 2009-06-30
- 发明人: Hiroyuki Hayashi , Takayuki Oshima , Hideo Aoki
- 申请人: Hiroyuki Hayashi , Takayuki Oshima , Hideo Aoki
- 申请人地址: JP Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Miles & Stockbridge P.C.
- 优先权: JP2005-331020 20051116
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
An object of the present invention is to prevent formation of a badly situated via metal in a Damascene wiring portion in multiple layers having an air-gap structure. In the present invention, a via is completely separated from an air-gap 45 by forming an interlayer insulating film 44 having the air-gap 45 between adjacent Damascene wiring portions after forming a sacrifice film pillar 42 from a selectively removable insulating film in a formation region of a connection hole. The present invention can provide multiple-layered buried wiring in which a high reliable via connection and a reduced parasitic capacitance due to the air-gap are achieved.
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