发明授权
- 专利标题: System and method for automatically adjusting the clock phase of a display in real-time
- 专利标题(中): 实时自动调整显示器时钟相位的系统和方法
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申请号: US10912646申请日: 2004-08-04
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公开(公告)号: US07554519B2公开(公告)日: 2009-06-30
- 发明人: Walter C. Lin , Jiande Jiang
- 申请人: Walter C. Lin , Jiande Jiang
- 申请人地址: TW Taipei
- 专利权人: Trident Microsystems (Far East) Ltd.
- 当前专利权人: Trident Microsystems (Far East) Ltd.
- 当前专利权人地址: TW Taipei
- 代理机构: DLA Piper LLP (US)
- 主分类号: G09G3/36
- IPC分类号: G09G3/36
摘要:
The present invention provides a system and method for adjusting clock phase in a digital display. The display 10 may include a target analog-to-digital converter 104 that generates a first digital signal based on an analog input signal and a first clock signal (CLK1). The system 100 includes a first clock phase adjustment circuit 108, which provides CLK1 to the target analog-to-digital converter 104. A second analog-to-digital converter 106 receives at least a portion of the analog input signal and a second adjusted clock signal (CLK2), and generates a second digital signal based on these inputs. A second clock phase adjustment circuit 100 is communicatively coupled to the second analog-to-digital converter 106, and transmits CLK2 to the second analog-to-digital converter. A controller 112 receives the second digital signal from the second analog-to-digital converter 106 and uses the signal to determine a preferred phase of CLK2. The controller 112 then causes the first clock phase adjustment circuit to adjust the phase of CLK1 based on the preferred phase.
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