发明授权
- 专利标题: Semiconductor memory device
- 专利标题(中): 半导体存储器件
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申请号: US11846634申请日: 2007-08-29
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公开(公告)号: US07554868B2公开(公告)日: 2009-06-30
- 发明人: Mitsuaki Hayashi
- 申请人: Mitsuaki Hayashi
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: Dickinson Wright, PLLC
- 优先权: JP2006-302620 20061108
- 主分类号: G11C7/02
- IPC分类号: G11C7/02
摘要:
A semiconductor memory cell is implemented in which the area of a row selection circuit is reduced and the effects of exposure, etching, and so on performed during manufacture are eliminated. The semiconductor memory device is provided with word line selection circuits connected with a row address signal line to select some desired word line according to an address input and dummy word line potential fixation circuits connected to word lines for dummy memory cells. As in the case of the word line selection circuits, the dummy word line potential fixation circuits each include a NAND gate NANDR(i) (i=−1, 0, m+1, or m+2) and an inverter INVR(i) (i=−1, 0, m+1, or m+2). The inputs of the dummy word line potential fixation circuits are connected with a row address signal line such that the word lines for the dummy memory cells are maintained in a non-selected state at all times. These make it possible to make the circuits which selectively drive all the word lines identical with each other in configuration, reduce the area of the row selection circuit, and eliminate the effects of exposure, etching, and so on during manufacture.
公开/授权文献
- US20080253211A1 SEMICONDUCTOR MEMORY DEVICE 公开/授权日:2008-10-16
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