发明授权
US07556987B2 Method of fabricating an integrated circuit with etched ring and die paddle
有权
制造具有蚀刻环和裸片的集成电路的方法
- 专利标题： Method of fabricating an integrated circuit with etched ring and die paddle
- 专利标题（中）： 制造具有蚀刻环和裸片的集成电路的方法
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申请号： US11428272申请日： 2006-06-30
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公开(公告)号： US07556987B2公开(公告)日： 2009-07-07
- 发明人: Antonio B. Dimaano, Jr. , Il Kwon Shim , Sheila Rima C. Magno
- 申请人： Antonio B. Dimaano, Jr. , Il Kwon Shim , Sheila Rima C. Magno
- 申请人地址： SG Singapore
- 专利权人： Stats Chippac Ltd.
- 当前专利权人： Stats Chippac Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L23/495 ; H01R43/00 ; H05K5/02
摘要：
An integrated circuit package system is provided including forming a D-ring comprising half etching a paddle, etching a ring, and etching a tie bar. The tie bar is between the paddle and the ring. The system further includes mounting an integrated circuit die on a central portion of the D-ring, connecting the integrated circuit die and the D-ring, and encapsulating the integrated circuit die and a portion of the D-ring.
公开/授权文献
- US20080001263A1 INTEGRATED CIRCUIT PACKAGE SYSTEM 公开/授权日：2008-01-03
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