Invention Grant
US07560345B2 Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage 失效
评估集成电路设计和结构中充电损坏潜力的方法,以防止充电损坏

Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage
Abstract:
A method for preventing charging damage during manufacturing of an integrated circuit design, having silicon over insulator (SOI) transistors. The method prevents damage from charging during processing to the gate of IC devices by assigning regions to the IC design such that the devices located within the regions have electrically independent nets, identifying devices that may have a voltage differential between the source or drain, and gate as susceptible devices within a given region, and connecting a element across the respective source or drain, and the gate of each of the susceptible devices such that the element is positioned within the region. The method includes connecting compensating conductors to an element to eliminate potential charging damage.
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