发明授权
US07568084B2 Semiconductor integrated circuit including multiple basic cells formed in arrays
失效
半导体集成电路包括以阵列形成的多个基本单元
- 专利标题: Semiconductor integrated circuit including multiple basic cells formed in arrays
- 专利标题(中): 半导体集成电路包括以阵列形成的多个基本单元
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申请号: US10886616申请日: 2004-07-09
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公开(公告)号: US07568084B2公开(公告)日: 2009-07-28
- 发明人: Hiroshi Tanaka , Yohei Akita , Tetsuro Honmura , Fumio Arakawa , Takanobu Tsunoda
- 申请人: Hiroshi Tanaka , Yohei Akita , Tetsuro Honmura , Fumio Arakawa , Takanobu Tsunoda
- 申请人地址: JP Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP.
- 优先权: JP2003-194013 20030709; JP2003-408411 20031208
- 主分类号: G06F15/00
- IPC分类号: G06F15/00
摘要:
A basic cell capable of a fixed operating frequency regardless of the configuration information, which is also capable of effectively utilizing the arithmetic logic circuit within the cell in a LSI semiconductor integrated circuit, is capable of dynamic changes in configuration information. The circuit has an input switch ISW connected to multiple data input nodes, an output switch OSW connected to multiple data output nodes, a first data path containing an arithmetic logic circuit ALU and a result storage flip-flop CFF0 between the input switch ISW and output switch OSW. The second data path containing a data transfer flip-flop between an input switch ISW and an output switch OSW, and the result storage flip-flop CFF stores the calculated result data from the arithmetic logic circuit ALU, and the data transfer flip-flop holds data input from any of the multiple data input nodes.
公开/授权文献
- US20050015572A1 Semiconductor integrated circuit 公开/授权日:2005-01-20
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