Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11283849Application Date: 2005-11-22
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Publication No.: US07576014B2Publication Date: 2009-08-18
- Inventor: Takashi Miyake , Hiroyuki Doi
- Applicant: Takashi Miyake , Hiroyuki Doi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-339424 20041124
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/469

Abstract:
A semiconductor device with a fuse 3a to be cut for a circuit modification, of which passivation film coating the uppermost wiring layer is formed in a two-layer structure including a first insulating film 11 with high filling capability and a second insulating film 12 blocking penetration of moisture or impurities. An opening 21 formed in a specific depth through the insulating films on the fuse 3a is coated by a third insulating film 13 with the blocking capability. This prevents the penetration of moisture or impurities, and the corrosion of the fuse 3a.
Public/Granted literature
- US20060110935A1 Semiconductor device and manufacturing method thereof Public/Granted day:2006-05-25
Information query
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