Invention Grant
- Patent Title: Edge incremental redundancy memory structure and memory management
- Patent Title (中): 边增量冗余内存结构和内存管理
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Application No.: US11843903Application Date: 2007-08-23
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Publication No.: US07584398B2Publication Date: 2009-09-01
- Inventor: Li Fung Chang , Yongqian Wang
- Applicant: Li Fung Chang , Yongqian Wang
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Garlick Harrison & Markison
- Agent Bruce E. Garlick; Holly L. Rudnick
- Main IPC: G08C25/02
- IPC: G08C25/02

Abstract:
A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes at least one processing device, an IR processing function, and IR memory. The at least one processing device is operable to receive analog signals corresponding to a data block, to sample the analog signals to produce samples, to equalize the samples to produce soft decision bits corresponding to the data block, and to initiate IR operations. The IR processing function is operable to perform IR operations on the soft decision bits of the data block in an attempt to correctly decode the data block. The IR memory operably couples to the IR processing function, includes Type I IR memory adapted to store IR status information of the data block, and includes Type II IR memory adapted to store the data block.
Public/Granted literature
- US20070288547A1 EDGE INCREMENTAL REDUNDANCY MEMORY STRUCTURE AND MEMORY MANAGEMENT Public/Granted day:2007-12-13
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