发明授权
US07596023B2 Memory device employing three-level cells and related methods of managing
有权
采用三层单元的存储器件及相关的管理方法
- 专利标题： Memory device employing three-level cells and related methods of managing
- 专利标题（中）： 采用三层单元的存储器件及相关的管理方法
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申请号： US11934144申请日： 2007-11-02
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公开(公告)号： US07596023B2公开(公告)日： 2009-09-29
- 发明人: Alessandro Magnavacca , Massimiliano Scotti , Nicola Del Gatto , Claudio Nava , Marco Ferrario , Massimiliano Mollichelli
- 申请人： Alessandro Magnavacca , Massimiliano Scotti , Nicola Del Gatto , Claudio Nava , Marco Ferrario , Massimiliano Mollichelli
- 代理机构： Schwabe, Williamson & Wyatt, P.C.
- 优先权： ITVA2006A00065 20061103; ITVA2007A00042 20070427
- 主分类号： G11C16/04
- IPC分类号： G11C16/04
摘要：
A memory device may include an array of addressable three-level cells, a coding circuit being input with three-bit strings and generating corresponding ternary strings based upon a code, and a program circuit being input with the ternary strings and storing them in respective pairs of three-level cells. The memory device also may include a read circuit reading stored ternary strings in the respective pairs of three-level cells, and a decoding circuit being input with the stored ternary strings and generating corresponding strings of three bits based upon the code.
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