A correlator comprises a plurality of phase rotators, a plurality of combining modules, a plurality of computation modules, and a selection module. The plurality of phase rotators selectively modifies phase for each chip of a first subset of chips by one of M phase offsets, where an incoming symbol comprises the first subset and a second subset of chips, and where M is an integer greater than one. The plurality of combining modules each combine a chip of the first subset with a respective chip of the second subset to generate an output. The plurality of computation modules includes inputs that communicate with the outputs of the plurality of combining modules and produces a plurality of correlator output signals. The selection module chooses one of the plurality of correlator output signals based upon a metric.