A thin film transistor array substrate for a liquid crystal display panel includes a gate line formed on a substrate. A data line crosses the gate line, thus defining a pixel region. A gate insulating film is positioned between the data line and the gate line. A thin film transistor is formed at a crossing of the gate line and the data line. A passivation film pattern exposes a portion of a drain electrode of the thin film transistor. At least one protrusion is provided to divide the pixel region into a plurality of regions, each of the regions having a different liquid crystal alignment from the other regions. A pixel electrode is connected to the thin film transistor to cover the pixel region excluding the passivation film pattern and the at least one protrusion.