Invention Grant
US07639056B2 Ultra low area overhead retention flip-flop for power-down applications
有权
用于断电应用的超低面积开销保持触发器
- Patent Title: Ultra low area overhead retention flip-flop for power-down applications
- Patent Title (中): 用于断电应用的超低面积开销保持触发器
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Application No.: US11138788Application Date: 2005-05-26
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Publication No.: US07639056B2Publication Date: 2009-12-29
- Inventor: Sumanth Katte Gururajarao , Hugh T. Mair , David B. Scott , Uming Ko
- Applicant: Sumanth Katte Gururajarao , Hugh T. Mair , David B. Scott , Uming Ko
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03K3/289
- IPC: H03K3/289 ; H03K3/356

Abstract:
In a method and system for data retention, a data input is latched by a first latch. A second latch coupled to the first latch receives the data input for retention while the first latch is inoperative in a standby power mode. The first latch receives power from a first power line that is switched off during the standby power mode. The second latch receives power from a second power line. A controller receives a clock input and a retention signal and provides a clock output to the first latch and the second latch. A change in the retention signal is indicative of a transition to the standby power mode. The controller continues to hold the clock output at a predefined voltage level and the second latch continues to receive power from the second power line in the standby power mode, thereby retaining the data input.
Public/Granted literature
- US20060267654A1 Ultra low area overhead retention flip-flop for power-down applications Public/Granted day:2006-11-30
Information query
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