Invention Grant
US07642143B2 Method of fabricating thin film transistor having multilayer structure and active matrix display device including the thin film transistor
失效
制造具有多层结构的薄膜晶体管的方法和包括该薄膜晶体管的有源矩阵显示装置
- Patent Title: Method of fabricating thin film transistor having multilayer structure and active matrix display device including the thin film transistor
- Patent Title (中): 制造具有多层结构的薄膜晶体管的方法和包括该薄膜晶体管的有源矩阵显示装置
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Application No.: US11870809Application Date: 2007-10-11
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Publication No.: US07642143B2Publication Date: 2010-01-05
- Inventor: Yong Hae Kim , Choong Heui Chung , Jae Hyun Moon , Yoon Ho Song
- Applicant: Yong Hae Kim , Choong Heui Chung , Jae Hyun Moon , Yoon Ho Song
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Ladas & Parry LLP
- Priority: KR10-2006-0123955 20061207
- Main IPC: H01L21/338
- IPC: H01L21/338

Abstract:
Provided are a method of fabricating a multilayered thin film transistor using a plastic substrate and an active matrix display device including the thin film transistor fabricated by the method. The method includes: preparing a substrate formed of plastic; forming a buffer insulating layer on the plastic substrate; forming a silicon layer on the buffer insulating layer; patterning the silicon layer to form an active layer; forming a gate insulating layer on the active layer; stacking a plurality of gate metal layers on the gate insulating layer; patterning the plurality of gate metal layers; and etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers. Accordingly, a gate metal is formed which includes a multilayered gate metal layer and has an etched corner region, thereby reducing an electric field of the corner to reduce a leakage current of the TFT.
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