发明授权
US07642146B2 Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
有权
具有NMOS高k电介质的半导体CMOS器件和方法存在于芯区中，可减轻介电材料的损坏
- 专利标题： Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
- 专利标题（中）： 具有NMOS高k电介质的半导体CMOS器件和方法存在于芯区中，可减轻介电材料的损坏
-
申请号： US11620447申请日： 2007-01-05
-
公开(公告)号： US07642146B2公开(公告)日： 2010-01-05
- 发明人: James Joseph Chambers , Mark Robert Visokay , Luigi Colombo
- 申请人： James Joseph Chambers , Mark Robert Visokay , Luigi Colombo
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238
摘要：
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An I/O dielectric layer is formed in core and I/O regions of a semiconductor device (506). The I/O dielectric layer is removed (508) from the core region of the device. A core dielectric layer is formed in the core region (510). A barrier layer is deposited and patterned to expose the NMOS devices of the core region (512). The core dielectric layer is removed from the core NMOS devices (514). A high-k dielectric layer is formed (514) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions/devices of the core region and the NMOS and PMOS regions/devices of the I/O region.
公开/授权文献
信息查询
IPC分类:
