发明授权
- 专利标题: Manufacturing method of silicon wafer
- 专利标题(中): 硅晶片的制造方法
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申请号: US10562236申请日: 2004-10-28
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公开(公告)号: US07645702B2公开(公告)日: 2010-01-12
- 发明人: Sakae Koyata , Kazushige Takaishi
- 申请人: Sakae Koyata , Kazushige Takaishi
- 申请人地址: JP Tokyo
- 专利权人: SUMCO Corporation
- 当前专利权人: SUMCO Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Greenblum & Bernstein, P.L.C.
- 优先权: JP2003-401657 20031201
- 国际申请: PCT/JP2004/016001 WO 20041028
- 国际公布: WO2005/055301 WO 20050616
- 主分类号: H01L21/302
- IPC分类号: H01L21/302
摘要:
The manufacturing method of the present invention provides a silicon wafer, both sides of the wafer having a highly accurate flatness and small surface roughness, which is a single surface mirror-polished wafer with the front and rear surfaces of the wafer identifiable by visual observation, and excellent in flatness when held by a stepper chuck and the like. The manufacturing method of the present invention includes an etching process, a lapping process, and a double surface polishing process to simultaneously polish the front and rear surfaces of a wafer after the etching process. The polishing removal depth (A) of the wafer front surface is 5 to 10 μm in the double surface simultaneous polishing process, and the polishing removal depth (B) in the rear surface is 2 to 6 μm, and a difference between the polishing removal depth A and the polishing removal depth B is 3 to 4 μm.
公开/授权文献
- US20070119817A1 Manufacturing method of silicon wafer 公开/授权日:2007-05-31