发明授权
- 专利标题: Data bus connection for memory device
- 专利标题(中): 存储设备的数据总线连接
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申请号: US10496920申请日: 2002-11-21
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公开(公告)号: US07647447B2公开(公告)日: 2010-01-12
- 发明人: Hua Li , Yuan Fuat Chin
- 申请人: Hua Li , Yuan Fuat Chin
- 申请人地址: FR Boulogne-Billancourt
- 专利权人: Thomson Licensing
- 当前专利权人: Thomson Licensing
- 当前专利权人地址: FR Boulogne-Billancourt
- 代理商 Robert D. Shedd; Joseph J. Opalach; Reitseng Lin
- 优先权: EP01403063 20011129
- 国际申请: PCT/EP02/13068 WO 20021121
- 国际公布: WO03/047322 WO 20030605
- 主分类号: G06F13/00
- IPC分类号: G06F13/00 ; G11C5/02 ; G06F17/50
摘要:
A data bus of a DVD+RW recorder between a DSP and a SDRAM usually needs a multilayer wiring board. In order to simplify the layout of the wiring board of the data bus there is provided a method for connecting at least a first and a second integrated circuit by providing the first integrated circuit having a plurality of first logical I/O ports physically arranged in a first order at the periphery, and providing the second integrated circuit having a plurality of second logical I/O ports physically arranged in a second order at the periphery, wherein each first I/O port is to be connected to one of said second I/O ports. The first and second I/O logical ports are connected independently from the first and/or second physical order, so that connection lines do not cross each other.
公开/授权文献
- US20050033865A1 Data bus connection for memory device 公开/授权日:2005-02-10
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