Invention Grant
- Patent Title: Method of forming a dielectric structure having a high dielectric constant and method of manufacturing a semiconductor device having the dielectric structure
- Patent Title (中): 具有高介电常数的介电结构的形成方法和具有电介质结构的半导体器件的制造方法
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Application No.: US11339416Application Date: 2006-01-25
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Publication No.: US07648874B2Publication Date: 2010-01-19
- Inventor: Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
- Applicant: Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec
- Priority: KR10-2005-0006543 20050125
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.
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