Invention Grant
US07649801B2 Semiconductor memory apparatus having column decoder for low power consumption 有权
具有低功耗的列解码器的半导体存储装置

Semiconductor memory apparatus having column decoder for low power consumption
Abstract:
The present invention relates to a column decoder for low power consumption in a semiconductor memory apparatus. The semiconductor device according to the present invention includes a column select signal decoder, which has a driving voltage input node and uses a driving voltage, for producing a plurality of column select signals by decoding a column select control signal; and a driving voltage supply controller for controlling a supply of the driving voltage to the driving voltage input node.
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