One embodiment of the present invention provides a system that reduces coherence traffic in a multiprocessor system by supporting both coherent memory accesses and non-coherent memory accesses. During operation, the system receives a request to perform a memory access. Next, the system obtains a page table entry (PTE) associated with the memory access. The system then determines if the memory access is coherent or non-coherent by examining an indicator in the PTE. If the memory access is coherent, the system performs the memory access using a coherence protocol. On the other hand, if the memory access is non-coherent, the system performs the memory access without generating coherence traffic.