发明授权
US07654466B2 Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method
有权
半导体存储卡，半导体存储器控制装置和半导体存储器控制方法
- 专利标题： Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method
- 专利标题（中）： 半导体存储卡，半导体存储器控制装置和半导体存储器控制方法
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申请号： US10553725申请日： 2004-09-13
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公开(公告)号： US07654466B2公开(公告)日： 2010-02-02
- 发明人: Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
- 申请人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： Smith Patent Office
- 优先权： JP2003-325811 20030918
- 国际申请： PCT/JP2004/013703 WO 20040913
- 国际公布： WO2005/029311 WO 20050331
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
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