发明授权
- 专利标题: Circuit, system and method for controlling read latency
- 专利标题(中): 用于控制读延迟的电路,系统和方法
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申请号: US11724910申请日: 2007-03-15
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公开(公告)号: US07656745B2公开(公告)日: 2010-02-02
- 发明人: Jongtae Kwak
- 申请人: Jongtae Kwak
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Dorsey & Whitney LLP
- 主分类号: G11C8/00
- IPC分类号: G11C8/00
摘要:
A read latency control circuit is described having a clock synchronization circuit and a read latency control circuit. The clock synchronization circuit includes an adjustable delay line to generate an output clock signal whose phase is synchronized with the phase of the input clock signal. The read latency control circuit captures a read command signal relative to the timing of the input clock signal and outputs the read command signal relative to the timing of the output clock signal such that the read command signal is outputted indicative of a specified read latency.
公开/授权文献
- US20080232179A1 Circuit, system and method for controlling read latency 公开/授权日:2008-09-25
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