发明授权
US07663134B2 Memory array with a selector connected to multiple resistive cells
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具有选择器的存储器阵列连接到多个电阻单元
- 专利标题: Memory array with a selector connected to multiple resistive cells
- 专利标题(中): 具有选择器的存储器阵列连接到多个电阻单元
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申请号: US11775741申请日: 2007-07-10
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公开(公告)号: US07663134B2公开(公告)日: 2010-02-16
- 发明人: Tzyh-Cheang Lee , Chun-Sheng Liang , Jiunn-Ren Hwang , Fu-Liang Yang
- 申请人: Tzyh-Cheang Lee , Chun-Sheng Liang , Jiunn-Ren Hwang , Fu-Liang Yang
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L47/00
- IPC分类号: H01L47/00
摘要:
An array includes a transistor cpmprising a first terminal, a second terminal and a third terminal; a first contact plug connected to the first terminal of the transistor; a second contact plug connected to the first terminal of the transistor; a first resistive memory cell having a first end and a second end, wherein the first end is connected to the first contact plug; and a second resistive memory cell having a third end and a fourth end, wherein the third end is connected to the second contact plug.
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