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US07663235B2 Semiconductor die with reduced bump-to-pad ratio 有权
半导体芯片具有降低的焊盘与焊盘的比例

Semiconductor die with reduced bump-to-pad ratio
Abstract:
According to one exemplary embodiment, a semiconductor die includes at least one pad ring situated on an active surface of the semiconductor die, where the at least one pad ring includes a number of pads. The semiconductor die further includes a number of bumps including at least one shared bump. The at least one shared bump is shared by at least two pads, thereby causing the number of bumps to be fewer than the number of pads. The at least two pads can be at least two ground pads, at least two power pads, or at least two reference voltage pads.
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