Invention Grant
- Patent Title: Method to improve ferroelectronic memory performance and reliability
- Patent Title (中): 提高铁电记忆性能和可靠性的方法
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Application No.: US11965350Application Date: 2007-12-27
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Publication No.: US07667997B2Publication Date: 2010-02-23
- Inventor: John Rodriguez
- Applicant: John Rodriguez
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G11C11/22
- IPC: G11C11/22

Abstract:
One embodiment of the present invention relates to a method by which the imprint of a ferroelectric random access memory (FRAM) array is reduced. The method begins when an event that will cause imprint to the memory array is anticipated by an external agent to the device comprising the chip. The external agent sends a command to the control circuitry that the data states are to be written to a particular data state. Upon receiving a signal the control circuitry writes all of the ferroelectric memory cells in the FRAM array to a preferred memory data state. The memory data states are held in the preferred data state for the entire duration of the event to minimize imprint of the FRAM memory cells. When the event ends the external agent sends a command to the control circuitry to resume normal memory operation. Other methods and circuits are also disclosed.
Public/Granted literature
- US20090168488A1 Method to Improve Ferroelectronic Memory Performance and Reliability Public/Granted day:2009-07-02
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