发明授权
- 专利标题: Methods for fabricating semiconductor structures with backside stress layers
- 专利标题(中): 制造具有背侧应力层的半导体结构的方法
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申请号: US11748738申请日: 2007-05-15
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公开(公告)号: US07670931B2公开(公告)日: 2010-03-02
- 发明人: Roey Shaviv
- 申请人: Roey Shaviv
- 申请人地址: US CA San Jose
- 专利权人: Novellus Systems, Inc.
- 当前专利权人: Novellus Systems, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Ingrassia Fisher & Lorenz, P.C.
- 主分类号: H01L21/322
- IPC分类号: H01L21/322
摘要:
Methods for fabricating semiconductor structures with backside stress layers are provided. In one exemplary embodiment, the method comprises the steps of providing a semiconductor device formed on and within a front surface of a semiconductor substrate. The semiconductor device comprises a channel region. A plurality of dielectric layers is formed overlying the semiconductor device. The plurality of dielectric layers comprises conductive connections that are in electrical communication with the semiconductor device. A backside stress layer is formed on a back surface of the semiconductor substrate. The backside stress layer is configured to apply to the channel region of the semiconductor device a uniaxial compressive or tensile stress that, with stresses applied by the plurality of dielectric layers, results in an overall stress exerted on the channel region to achieve a predetermined overall strain of the channel region.
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