发明授权
- 专利标题: Plating method, semiconductor device fabrication method and circuit board fabrication method
- 专利标题(中): 电镀方法,半导体器件制造方法和电路板制造方法
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申请号: US11250399申请日: 2005-10-17
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公开(公告)号: US07670940B2公开(公告)日: 2010-03-02
- 发明人: Masataka Mizukoshi , Kanae Nakagawa , Takeshi Shioga , Kazuaki Kurihara , John David Baniecki
- 申请人: Masataka Mizukoshi , Kanae Nakagawa , Takeshi Shioga , Kazuaki Kurihara , John David Baniecki
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP
- 优先权: JP2004-303345 20041018; JP2005-235229 20050815
- 主分类号: H01L21/76
- IPC分类号: H01L21/76
摘要:
The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10, as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
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