发明授权
US07671649B2 Apparatus and method for generating multi-phase clocks 有权
用于产生多相时钟的装置和方法

  • 专利标题: Apparatus and method for generating multi-phase clocks
  • 专利标题(中): 用于产生多相时钟的装置和方法
  • 申请号: US12003681
    申请日: 2007-12-31
  • 公开(公告)号: US07671649B2
    公开(公告)日: 2010-03-02
  • 发明人: Kwang-Jin Na
  • 申请人: Kwang-Jin Na
  • 申请人地址: KR Gyeonggi-do
  • 专利权人: Hynix Semiconductor, Inc.
  • 当前专利权人: Hynix Semiconductor, Inc.
  • 当前专利权人地址: KR Gyeonggi-do
  • 代理机构: IP & T Law Firm PLC
  • 优先权: KR10-2007-0111481 20071102
  • 主分类号: H03L7/06
  • IPC分类号: H03L7/06
Apparatus and method for generating multi-phase clocks
摘要:
An apparatus for generating multi-phase clocks in accordance with the present invention includes a clock delay configured to delay a source clock by a delay time corresponding to a control signal to generate a plurality of clocks; a clock multiplexer configured to output a first clock for a first locking region and a second clock for a second locking region sequentially as a selected clock in response to a locking detection signal; a phase detector configured to detect a phase of the selected clock in comparison to a phase of the source clock to output a phase detection signal; and a control voltage signal generator configured to generate the control signal corresponding to the phase detection signal.
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