发明授权
- 专利标题： Memory devices having reduced word line current and method of operating and manufacturing the same
- 专利标题（中）： 具有减少字线电流的存储器件及其操作和制造方法
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申请号： US11951166申请日： 2007-12-05
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公开(公告)号： US07675778B2公开(公告)日： 2010-03-09
- 发明人: Seiichi Aritome
- 申请人： Seiichi Aritome
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Fletcher Yoder
- 主分类号： G11C16/04
- IPC分类号： G11C16/04
摘要：
There is provided a memory array and methods for manufacturing the same. In one embodiment, there is provided a string comprising a plurality of transistors. Each of the plurality of transistors includes: a charge storage node, a control gate, and at least one resistive element coupled to the string. The control gate of at least one of the plurality of transistors can be selectively coupled to a reference potential via a corresponding one of the at least one resistive element.
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