发明授权
US07680140B2 Systems including packet interfaces, switches, and packet DMA circuits for splitting and merging packet streams
失效
包括用于分组和合并分组流的分组接口，交换机和分组DMA电路的系统
- 专利标题： Systems including packet interfaces, switches, and packet DMA circuits for splitting and merging packet streams
- 专利标题（中）： 包括用于分组和合并分组流的分组接口，交换机和分组DMA电路的系统
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申请号： US11803637申请日： 2007-05-15
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公开(公告)号： US07680140B2公开(公告)日： 2010-03-16
- 发明人: Barton Sano , Laurent R. Moll , Manu Gulati
- 申请人： Barton Sano , Laurent R. Moll , Manu Gulati
- 申请人地址： US CA Irvine
- 专利权人： Broadcom Corporation
- 当前专利权人： Broadcom Corporation
- 当前专利权人地址： US CA Irvine
- 代理机构： Garlick Harrison & Markison
- 主分类号： H04L12/56
- IPC分类号： H04L12/56
摘要：
An integrated circuit includes receive circuits for receiving packets, transmit circuits for transmitting packets, a packet DMA circuit for communicating packets to and from a memory controller, and a switch for selectively coupling the receive circuits to transmit circuits. The integrated circuit may flexibly merge and split the packet streams to provide for various packet processing/packet routing functions to be applied to different packets within the packet streams. An apparatus may include two or more of the integrated circuits, which may communicate packets between respective receive and transmit circuits.
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