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US07681628B2 Dynamic control of back gate bias in a FinFET SRAM cell 失效
FinFET SRAM单元中背栅极偏置的动态控制

Dynamic control of back gate bias in a FinFET SRAM cell
摘要:
The present invention provides dynamic control of back gate bias on pull-up pFETs in a FinFET SRAM cell. A method according to the present invention includes providing a bias voltage to a back gate of at least one transistor in the SRAM cell, and dynamically controlling the bias voltage based on an operational mode (e.g., Read, Half-Select, Write, Standby) of the SRAM cell.
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