发明授权
- 专利标题: Flat cable covering means for generating different impendances
- 专利标题(中): 扁平电缆覆盖装置,用于产生不同的阻力
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申请号: US12014166申请日: 2008-01-15
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公开(公告)号: US07683263B2公开(公告)日: 2010-03-23
- 发明人: Chin-Chih Chiang
- 申请人: Chin-Chih Chiang
- 申请人地址: TW Taipei
- 专利权人: Jess-Link Products Co., Ltd.
- 当前专利权人: Jess-Link Products Co., Ltd.
- 当前专利权人地址: TW Taipei
- 代理商 Chun-Ming Shih
- 优先权: TW96212607U 20070801
- 主分类号: H01B7/08
- IPC分类号: H01B7/08
摘要:
A flat cable covering means for generating different impedances includes a plurality of cores, an insulating body and a first metallic covering layer. The cores are arranged at an interval respectively. The insulating body covers an outer surface of the cores. The first metallic covering layer is provided to correspond to a portion of cores and partially covers one side of the insulating body with the impedance of the cores in an area covered by the first metallic covering layer smaller than that of the cores in an area not covered by the first metallic covering layer. Via this arrangement, in order to correspond to the need of impedances of different devices in the electronic apparatus, the different impedances can be made integrally in the same flat cable. In this way, not only the manufacturing and assembling processes can be simplified, but also the management and layout of lines are simple and convenient.
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