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US07683432B2 Semiconductor device having high-k gate dielectric layer and method for manufacturing the same 有权
具有高k栅介质层的半导体器件及其制造方法

  • Patent Title: Semiconductor device having high-k gate dielectric layer and method for manufacturing the same
  • Patent Title (中): 具有高k栅介质层的半导体器件及其制造方法
  • Application No.: US10572730
    Application Date: 2005-06-20
  • Publication No.: US07683432B2
    Publication Date: 2010-03-23
  • Inventor: Hiroshi Oji
  • Applicant: Hiroshi Oji
  • Applicant Address: JP Kyoto
  • Assignee: Rohm Co., Ltd.
  • Current Assignee: Rohm Co., Ltd.
  • Current Assignee Address: JP Kyoto
  • Agency: Keating & Bennett, LLP
  • Priority: JP2004-187240 20040625
  • International Application: PCT/JP2005/011260 WO 20050620
  • International Announcement: WO2006/001249 WO 20060105
  • Main IPC: H01L21/8238
  • IPC: H01L21/8238
Semiconductor device having high-k gate dielectric layer and method for manufacturing the same
Abstract:
A semiconductor device having a high-K gate dielectric layer includes a p-type well that is formed in an upper layer of a silicon substrate. Arsenic ions are implanted into an extreme surface layer of the p-type well and a heat treatment is performed to form a p-type low-concentration layer. A HfAlOx film and a polycrystalline silicon layer are laminated on the substrate. A gate electrode is formed by patterning the polycrystalline silicon layer. After a n-type extension region is formed by implanting arsenic ions by using the gate electrode as a mask, sidewall spacers are formed on sides of the gate electrode. Arsenic ions are implanted by using the sidewall spacers and the gate electrode as masks, whereby n-type source/drain regions are formed.
Abstract(Chinese):

具有高K栅极电介质层的半导体器件包括形成在硅衬底的上层中的p型阱。 将砷离子注入到p型阱的极端表面层中，进行热处理以形成p型低浓度层。 HfAlOx膜和多晶硅层层叠在基板上。 通过图案化多晶硅层形成栅电极。 在通过使用栅电极作为掩模注入砷离子形成n型延伸区之后，在栅电极的侧面形成侧壁间隔物。 通过使用侧壁间隔物和栅电极作为掩模来注入砷离子，由此形成n型源极/漏极区。

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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78 ...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82 ....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822 .....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232 ......场效应工艺
H01L21/8234 .......MIS工艺
H01L21/8238 ........互补场效应晶体管，例如CMOS
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