Invention Grant
US07687371B2 Method of forming isolation structure of semiconductor device for preventing excessive loss during recess gate formation
失效
形成半导体器件的隔离结构的方法,用于防止在凹陷栅极形成期间的过度损耗
- Patent Title: Method of forming isolation structure of semiconductor device for preventing excessive loss during recess gate formation
- Patent Title (中): 形成半导体器件的隔离结构的方法,用于防止在凹陷栅极形成期间的过度损耗
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Application No.: US12243133Application Date: 2008-10-01
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Publication No.: US07687371B2Publication Date: 2010-03-30
- Inventor: Dong Sun Sheen , Seok Pyo Song , Sang Tae Ahn , Hyeon Ju An
- Applicant: Dong Sun Sheen , Seok Pyo Song , Sang Tae Ahn , Hyeon Ju An
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2006-0061369 20060630
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask. An SOG layer is formed in the trench partially filling the trench. An amorphous aluminum oxide layer is formed on the resultant substrate including the SOG layer. An HDP layer is formed on the amorphous aluminum oxide layer to completely fill the trench. The HDP layer and the amorphous aluminum oxide layer are subjected to CMP to expose the hard mask. The hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer are removed. The amorphous aluminum oxide layer is crystallized.
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