A Plasma Display Panel (PDP) capable of reducing an address discharge voltage between address electrodes and Y electrodes, suppressing an address discharge delay, and improving brightness includes: a first substrate, a second substrate spaced apart from the first substrate and facing the first substrate, barrier ribs arranged between the first and second substrates and defining discharge cells where a discharge occurs, discharge electrode pairs including X electrodes and Y electrodes extending across the discharge cells, floating electrodes arranged closer to the Y electrodes than to the X electrodes, address electrodes extending across the discharge cells and intersecting the discharge electrode pairs within the discharge cells, and phosphor layers arranged within the discharge cells. Portions of the address electrodes facing the Y electrodes are wider than portions of the address electrodes facing the X electrodes, or distances between the Y electrodes and the portions of the address electrodes facing the Y electrodes are shorter than distances between the X electrodes and the portions of the address electrodes facing the X electrodes.