发明授权
- 专利标题: Method of identifying specific holes in an interface guiding plate
- 专利标题(中): 识别接口导板中特定孔的方法
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申请号: US11732087申请日: 2007-04-02
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公开(公告)号: US07695766B2公开(公告)日: 2010-04-13
- 发明人: Neil Adams , Stuart Eickhoff , Jon Hample
- 申请人: Neil Adams , Stuart Eickhoff , Jon Hample
- 申请人地址: US MN Maple Grove
- 专利权人: Circuit Check
- 当前专利权人: Circuit Check
- 当前专利权人地址: US MN Maple Grove
- 代理机构: Altera Law Group, LLC
- 主分类号: B05D3/00
- IPC分类号: B05D3/00
摘要:
A circuit board tester that uses a dual-stage translation to bring a unit under test (UUT) into physical and electric contact first with a series of tall probes, then with a series of short probes. Initially, the UUT is mounted on a support plate, and spaced apart from both the tall and short probes. First, in order to perform a functional test on the UUT, a first vacuum stage is engaged, and atmospheric pressure translates the UUT longitudinally until contact is made with a first hard stop, defining a first position. At this first position, the UUT is in contact with a series of tall probes, and is spaced apart from a series of short probes. After a function test is performed, a second vacuum stage is engaged in addition to, and independent of, the first vacuum stage. Atmospheric pressure translates the UUT longitudinally until contact is made with a second hard stop, defining a second position.
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