发明授权
- 专利标题: Wafer level package fabrication method
- 专利标题(中): 晶圆级封装制造方法
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申请号: US12155317申请日: 2008-06-02
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公开(公告)号: US07696004B2公开(公告)日: 2010-04-13
- 发明人: Jingli Yuan , Jae Cheon Doh , Si Joong Yang , In Goo Kang , Seung Wook Park
- 申请人: Jingli Yuan , Jae Cheon Doh , Si Joong Yang , In Goo Kang , Seung Wook Park
- 申请人地址: KR Suwon
- 专利权人: Samsung Electro-Mechanics Co., Ltd.
- 当前专利权人: Samsung Electro-Mechanics Co., Ltd.
- 当前专利权人地址: KR Suwon
- 优先权: KR10-2007-0053718 20070601
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.
公开/授权文献
- US20080299706A1 Wafer level package fabrication method 公开/授权日:2008-12-04
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