发明授权
- 专利标题： Integrated circuit package system for chip on lead
- 专利标题（中）： 集成电路封装系统，用于芯片上的引线
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申请号： US11856879申请日： 2007-09-18
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公开(公告)号： US07701042B2公开(公告)日： 2010-04-20
- 发明人: Shao Jian Chen , Wei Qiang Jin , Bhoy Ching , Taw Ming Lau
- 申请人： Shao Jian Chen , Wei Qiang Jin , Bhoy Ching , Taw Ming Lau
- 申请人地址： SG Singapore
- 专利权人： Stats Chippac Ltd.
- 当前专利权人： Stats Chippac Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号： H01L23/495
- IPC分类号： H01L23/495
摘要：
An integrated circuit package system includes providing an integrated circuit die having planar dimensions; forming a lead extended across one of the planar dimensions of the integrated circuit die; and applying an adhesive layer over the lead of a side opposite the integrated circuit die.
公开/授权文献
- US20080073781A1 INTEGRATED CIRCUIT PACKAGE SYSTEM FOR CHIP ON LEAD 公开/授权日：2008-03-27
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