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US07702713B2 High speed FFT hardware architecture for an OFDM processor 有权
用于OFDM处理器的高速FFT硬件架构

High speed FFT hardware architecture for an OFDM processor
Abstract:
A novel technique for providing high speed FFT architecture for OFDM processors that reduces silicon area while maintaining the high speed requirement. In one example embodiment, this is accomplished by pipelined and/or sequential implementation of two or more FFT stages so that each stage performs a small portion of the FFT.
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