发明授权
- 专利标题: Design structure to eliminate step response power supply perturbation
- 专利标题(中): 消除阶跃响应电源扰动的设计结构
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申请号: US11847362申请日: 2007-08-30
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公开(公告)号: US07705626B2公开(公告)日: 2010-04-27
- 发明人: Igor Arsovski , Joseph A. Iadanza
- 申请人: Igor Arsovski , Joseph A. Iadanza
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Scully, Scott, Murphy & Presser, P.C.
- 代理商 Michael J. LeStrange, Esq.
- 主分类号: H03K17/16
- IPC分类号: H03K17/16 ; H03K19/003
摘要:
A design structure for eliminating step response power supply perturbation during voltage island power-up/power-down on an integrated circuit is disclosed. An IC chip communicates with a primary power supply and includes at least one voltage island. A primary header on the voltage island of the chip communicates with the primary power supply via a primary header power path. A secondary header on the voltage island of the chip communicates with a secondary power supply via a secondary header power path. A control decoder communicating with the IC chip and the voltage island regulates the state of the primary and secondary headers.
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