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US07706996B2 Write-side calibration for data interface 失效
数据接口的写入侧校准

Write-side calibration for data interface
摘要:
Circuits, methods and apparatus are provided to reduce skew among signals being provided or transmitted by a data interface. Signal path delays are varied such that signals transmitted by a memory interface are calibrated or aligned with each other along a rising and/or falling edge. For example, self-calibration, external circuitry, or design tools can provide skew adjustment of each output channel by determining one or more delays for each output channel path. When aligning multiple edges, the edges of the output signals may be aligned independently, e.g., using edge specific delay elements.
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