发明授权
- 专利标题: Methods and apparatus for an efficient floating point ALU
- 专利标题(中): 用于高效浮点ALU的方法和装置
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申请号: US11157650申请日: 2005-06-21
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公开(公告)号: US07707236B2公开(公告)日: 2010-04-27
- 发明人: Saurbh Srivastava
- 申请人: Saurbh Srivastava
- 申请人地址: US MA Norwood
- 专利权人: Analog Devices, Inc.
- 当前专利权人: Analog Devices, Inc.
- 当前专利权人地址: US MA Norwood
- 代理机构: Goodwin Procter LLP
- 主分类号: G06F7/42
- IPC分类号: G06F7/42
摘要:
The present invention provides an improved technique for performing a near processing path exponent difference in an arithmetic logic unit (ALU) of a microprocessor. In one embodiment, an apparatus having a separate logic circuit for near processing path and far processing path subtraction generates exponent difference signals using only two least significant bits of exponents of the two floating point operands to perform the exponent difference.
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