发明授权
- 专利标题: Method of fabricating a semiconductor device and a method of generating a mask pattern
- 专利标题(中): 制造半导体器件的方法和产生掩模图案的方法
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申请号: US11522995申请日: 2006-09-19
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公开(公告)号: US07707523B2公开(公告)日: 2010-04-27
- 发明人: Kiyohito Mukai , Tadashi Tanimoto , Mitsumi Ito
- 申请人: Kiyohito Mukai , Tadashi Tanimoto , Mitsumi Ito
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: McDermott Will & Emery LLP
- 优先权: JPP2002-270068 20020917
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
At least a groove for separating a semiconductor substrate into a first region of a relatively large area and a second region of a relatively small area is formed. An insulating film is formed on the surface of the semiconductor substrate including the interior of the groove. The insulating film is etched using an etching mask having a lattice window pattern in such a manner that openings corresponding to the lattice window pattern are formed in the first region. As an alternative, openings corresponding to a single opening pattern are formed in the first region using an etching mask having the single opening pattern and the lattice window pattern, and the insulating film is etched in such a manner that openings corresponding to the lattice window pattern are formed in the second region. In both cases, the remaining insulating film is polished off.
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