发明授权
- 专利标题: Integrated circuit for scan driving
- 专利标题(中): 用于扫描驱动的集成电路
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申请号: US10717235申请日: 2003-11-18
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公开(公告)号: US07714827B2公开(公告)日: 2010-05-11
- 发明人: Yasushi Kubota , Seiji Murakami
- 申请人: Yasushi Kubota , Seiji Murakami
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 William B. Kempler; Wade J. Brady, III; Frederick J. Telecky, Jr.
- 优先权: JP2002-348991 20021129
- 主分类号: G09G3/36
- IPC分类号: G09G3/36
摘要:
An integrated circuit is provided for scan driving that can significantly reduce the chip size. In first region AODD, odd-numbered output pads OUT1, OUT3, . . . OUT173, OUT175, driver circuits DR1, DR3, . . . DR173, DR175, and flip-flops SREG1, SREG3, . . . SREG173, SREG175 in an order corresponding to the order of the odd-numbered scanning lines are each arranged as a column in the X-direction, and, at the same time, output pads OUTi, driver circuits DRi and flip-flops SREGi corresponding to the scanning lines are arranged in the same row in the Y-direction (chip width direction). In second region AEVEN, even-numbered output pads OUT2, OUT4, . . . OUT174, OUT176, driver circuits DR2, DR4, . . . DR174, DR176, and flip-flops SREG2, SREG4, . . . SREG174, SREG176 in an order corresponding to the order of the even-numbered scanning lines are each arranged as a column in the X-direction, and, at the same time, output pads OUTi, driver circuits DRi and flip-flops SREGi corresponding to the scanning lines are arranged in the same row in the Y-direction (chip width direction).
公开/授权文献
- US20040160432A1 Integrated circuit for scan driving 公开/授权日:2004-08-19
信息查询
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