发明授权
- 专利标题： Method for forming a gate insulating film
- 专利标题（中）： 栅绝缘膜的形成方法
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申请号： US12349192申请日： 2009-01-06
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公开(公告)号： US07727911B2公开(公告)日： 2010-06-01
- 发明人: Kenji Yoneda , Kazuhiko Yamamoto
- 申请人： Kenji Yoneda , Kazuhiko Yamamoto
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2008-003336 20080110
- 主分类号： H01L21/31
- IPC分类号： H01L21/31
摘要：
In formation of a gate insulating film made of a high dielectric constant metal silicate, atomic layer deposition (ALD) is performed by setting exposure time to a precursor containing a metal or the like to saturation time of a deposition rate by a surface adsorption reaction and by setting exposure time to an oxidizing agent to time required for a composition of a metal oxide film to reach 97% or more of a stoichiometric value.
公开/授权文献
- US20090181549A1 METHOD FOR FORMING A GATE INSULATING FILM 公开/授权日：2009-07-16
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