发明授权
US07729195B2 Semiconductor memory device having split word line driver circuit with layout patterns that provide increased integration density
有权
具有分离字线驱动电路的半导体存储器件具有提供增加的集成密度的布局图案
- 专利标题： Semiconductor memory device having split word line driver circuit with layout patterns that provide increased integration density
- 专利标题（中）： 具有分离字线驱动电路的半导体存储器件具有提供增加的集成密度的布局图案
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申请号： US11935887申请日： 2007-11-06
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公开(公告)号： US07729195B2公开(公告)日： 2010-06-01
- 发明人: Jae-Youn Youn , Yoon-Hwan Yoon , Sang-Jae Rhee
- 申请人： Jae-Youn Youn , Yoon-Hwan Yoon , Sang-Jae Rhee
- 申请人地址： KR Suwon-Si
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Suwon-Si
- 代理机构： F. Chau & Associates, LLC
- 优先权： KR10-2006-00110329 20061109
- 主分类号： G11C8/00
- IPC分类号： G11C8/00
摘要：
Semiconductor memory devices having hierarchical word line structures are provided. A block of sub-word line driver circuits (SWDB) are disposed between a first block of memory and a second block of memory. A SWDB includes a plurality of sub-wordline driver (SWD) circuits arranged in a plurality of SWD columns each having four SWD circuits extending in a first direction between the first and second blocks of memory. Two adjacent SWD columns include a SWD group for driving a plurality of sub-word lines extending from the SWD group along the first direction into the first and second blocks of memory.