A differential amplifier (10-1,2) includes an input stage (7) including first (M1) and second (M2) input transistors and first (4A) and second (4B) load devices. Sources of the first and second input transistors are connected together. Drains of the first and second input transistors are coupled by first (12) and second (13) conductors to the first and second load devices, respectively. Common mode feedback circuitry (6A) including first (M3), second (M4), and third (M5) transistors is combined with offset correction circuitry (8) including the second transistor and the third transistor. Sources of the first, second, and third transistors are coupled to a tail current source (11). Drains of the second and third transistors are coupled to the first and second conductors, respectively. A common mode voltage (VOCM) is applied to a gate of the first transistor. Offset trim voltages are applied to gates of the second and third transistors.