发明授权
- 专利标题： Chip carrier and fabrication method
- 专利标题（中）： 芯片载体和制造方法
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申请号： US12393034申请日： 2009-02-25
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公开(公告)号： US07733661B2公开(公告)日： 2010-06-08
- 发明人: Dean Paul Kossives , Byung Joon Han
- 申请人： Dean Paul Kossives , Byung Joon Han
- 申请人地址： SG Singapore
- 专利权人： Stats Chippac Ltd.
- 当前专利权人： Stats Chippac Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号： H05K7/00
- IPC分类号： H05K7/00
摘要：
A substrate having a ground plane, a first side, and a second side is provided. A via that electrically connects the first side to the second side is formed. A printed wire is formed on the first side, and a printed wire is formed on the second side. A passive component is formed on the first side. The passive component is formed free of the ground plane. An active component is attached to the first side.
公开/授权文献
- US20090161330A1 CHIP CARRIER AND FABRICATION METHOD 公开/授权日：2009-06-25
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