发明授权
- 专利标题: Block distortion reduction apparatus
- 专利标题(中): 块变形减少装置
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申请号: US10868836申请日: 2004-06-17
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公开(公告)号: US07738726B2公开(公告)日: 2010-06-15
- 发明人: Kimiyasu Honma , Mitsuaki Shiraga , Hiroshi Kobayashi
- 申请人: Kimiyasu Honma , Mitsuaki Shiraga , Hiroshi Kobayashi
- 申请人地址: JP Tokyo
- 专利权人: Sony Corporation
- 当前专利权人: Sony Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- 优先权: JP2003-181544 20030625
- 主分类号: G06K9/40
- IPC分类号: G06K9/40
摘要:
A block distortion reduction apparatus, enabling easy processing by a small-sized circuit configuration and enabling generation of block distortion reduction parameters by any area unit inside a frame, which averages encoding coefficients in a macroblock units to obtain a DCT parameter, calculates a DMV parameter of differential motion vectors by weighting in accordance with the encoding mode of the macroblock unit, and determines a correction value for the block distortion reduction based on these parameters.
公开/授权文献
- US20050018922A1 Block distortion reduction apparatus 公开/授权日:2005-01-27
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